Embodiments of the present invention relate to a non-volatile memory device, and more particularly, to a non-volatile memory device including a memory cell array where data is programmed and a method for programming the non-volatile memory device, using a pseudo Single Level Cell (SLC) buffer scheme and a Multi Level Cell (MLC) scheme.
Flash memory serving as a non-volatile memory device has higher stability and lower power consumption than a hard disk drive (HDD). The above-mentioned advantages of the flash memory are appropriate for miniaturization of electronic appliances, so that the demand for flash memories is rapidly increasing.
The flash memory performs three operations, i.e., a read operation, a write (program) operation, and an erase operation. The read and write operations are carried out on a page basis, and the erase operation is carried out on a block basis. Characteristics of the flash memory include having different operation units where a plurality of pages in one block is sequentially used. Due to the above-mentioned characteristics of the flash memory, a system designed to use the flash memory converts a logical address of a higher layer into a physical address of the flash memory using a flash translation layer (FTL), such that the flash memory can access the desired data according to the physical address.